The output frequency of a fixed frequency simple package crystal oscillator (SPXO) is determined by the built-in crystal unit, which is designed and manufactured specifically for each frequency. On the other hand, a programmable SPXO (P-SPXO) can freely select the output frequency by setting the PLL circuit. Compared to a SPXO, the P-SPXO lead time is shorter and can be programmed to output any frequency requested by the user.
However, the P-SPXO has a jitter disadvantage compared to the SPXO due to the influence of the PLL circuit. This technical note introduces Epson's efforts to reduce jitter and overcome these disadvantages of P-SPXO.
【Development goals for low jitter】
In general, low jitter characteristics can be obtained by designing with a large SPXO current consumption. This is because the circuit design that raises the signal level of the oscillator circuit increases the current consumption, improves the S/N ratio (signal-to-noise ratio), and eventually improves the jitter caused by noise. As long as the design is based on this trade-off, the current consumption must be large in order to obtain low jitter characteristics.
With the goal to counter the above trade-off, we adopted FoM (Figure of Merit) shown in the following formula as an index. This equation replaces the trade-off jitter characteristics and current consumption with "phase jitter" and "power consumption" and normalizes them.
FoM [dB] = 20 log (Jitter/1[s]) + 10 log (Power/1[mW])
Jitter : phase jitter
Power : Power consumption
The P-SPXO SG-8101 series has low jitter performance with FoM = -200 dB, and our SPXO has better jitter performance with FoM = -240 dB. By setting the development goal of reducing FoM of P-SPXO, it will lead to a fundamental performance improvement. We have set a new P-SPXO development goal of FoM = -225 dB. This corresponds to FoM of our low-jitter PLL oscillator that uses an Integer type PLL. However, the Integer type PLL is limited to an integer multiple of the built-in crystal unit. Therefore, we set the goal of FoM, which is equivalent to the Integer type PLL, by using the Fractional type PLL that can freely set any frequency. In addition, we aimed for miniaturization and high accuracy to align with the market trend and manufacturing concept of “efficient, compact, and precision.” Specifically, we started development with the goal of reducing the area ratio by 64 % and expanding the upper limit of the operating temperature range from +105 °C to +125 °C compared to the current SG-8101 series. As a result, the goal of FoM = -225 dB was achieved. We succeeded in breaking the trade-off and commercialized a small P-SPXO, SG-8201 series, with low current consumption and low jitter characteristics.
Figure 1. Comparison of our SPXO in terms of phase jitter vs. power consumption
【Low-jitter technology for PLL circuit】
The PLL circuit (example) a block diagram as shown below in Figure 2.
Figure 2. PLL circuit
When the reference clock generated by the crystal oscillator is input to the PLL circuit, it can be adjusted to the target frequency and output according to the frequency division ratio of the frequency divider of the PLL circuit. But the jitter characteristics deteriorate due to the frequency adjustment of the PLL circuit. Finding out which part of the PLL circuit causes the deterioration of the jitter characteristics and improving it will lead to the achievement of the development goal - to break the trade-off between the jitter characteristics and the current consumption.
・Low-jitter technology for VCO
VCO is an oscillator whose frequency can be controlled by a control voltage. There are two types of VCO circuits, one is the Ring VCO and the other is the LC VCO. The respective circuit configurations are shown in Figure. 3 and 4.
Figure 3. Ring VCO Figure 4. LC VCO
Ring VCO has a circuit configuration in which an odd number of inverters are connected to apply positive feedback, and the frequency is controlled by changing the current supplied to the inverters according to the control voltage. The circuit size is small, and the current consumption is low, but the jitter characteristics suffers. Our P-SPXO SG8101 series adopted Ring VCO with the development goal of prioritizing small size and low current consumption characteristics. On the other hand, the LC VCO has a circuit configuration that oscillates by LC resonance, and the frequency is controlled by applying a control voltage to the variable capacitance capacitor and changing the capacitance. Since LC VCO has good jitter characteristics, we tried to achieve the development goal by LC VCO. However, there is a problem with integrating the coil as it occupies a large IC area compared to a Ring VCO. If the coil is designed to be smaller, the inductance value also becomes smaller which then rises the current consumption of the VCO. To solve this problem, we focused on eddy currents. Since the Q and inductance value of the coil decrease due to the eddy current generated in the surrounding conductors, we investigated a method to suppress the generation of eddy current. By examining various wiring shapes using an electromagnetic field simulator and finding a design that minimizes the decrease in Q value, the coil occupied area was reduced as much as possible. After making a prototype at our FAB to confirm the effect with the actual IC, we found that it was possible to use LC VCO to achieve the reduced jitter.
・Achieving small, high accuracy with low jitter
Our development goals included "small" and "high accuracy" in addition to low jitter. Therefore, it was necessary to make it smaller than the IC size of the SG-8101 series to fit in the size targeted for the development of the SG8201 series. Figure 5 shows a block diagram of the SG-8101 series and the SG-8201 series.
Figure 5. Block diagram of SG-8101 series and SG-8201 series
Although the LC VCO was successfully miniaturized, it was still larger than the area of Ring VCO used in the SG8101 series, so it was necessary to miniaturize other circuits besides the PLL. The temperature compensation circuit occupied the next largest area following the PLL. The temperature compensation circuit is important for achieving high accuracy, especially to accommodate the upper operating temperature of + 125 °C. Miniaturization was required here, so we decided to make a drastic change from the conventional temperature compensation circuit.
In addition to the technological development described above, we reviewed the design of the frequency control circuit and was able to further optimize the circuit layout to reduce the IC size and also improve jitter. As a result, we achieved the development goal of FoM = -225 dB and achieved great results by overcoming the trade-off between jitter characteristics and current consumption, and achieving both small and high accuracy.
【Comparison with conventional products】
Figure 6 shows the phase noise and phase jitter characteristics of the SG-8201 series. Compared to the SG-8101 series, it achieves significantly lower jitter.
Figure 6. Comparison of phase noise and phase jitter characteristics (SG-8101 series vs SG-8201 series)
The P-SPXO SG-8201 series, which features low jitter characteristics, small size and high accuracy, is suitable for various applications and help to maximize the value of the customers' products. Seiko Epson will continue to develop crystal devices that enrich society.